Integrated circuit devices include large numbers of microelectronic devices such as transistors, diodes, capacitors, and resistors in an integrated circuit substrate. It is important to electrically isolate these devices from one another in the integrated circuit substrate. Moreover, as the integration density of integrated circuit devices continues to increase, it becomes desirable to form narrow isolation regions which do not occupy excessive integrated circuit area while still effectively isolating adjacent devices.
One well known method for forming isolation regions for an integrated circuit substrate is LOCal Oxidation of Silicon (LOCOS). The LOCOS method uses local oxidation of a silicon integrated circuit substrate to form oxide isolation regions for the substrate.
FIGS. 1A-1C are cross-sectional views illustrating a conventional LOCOS method. As shown in FIG. 1A, a silicon oxide layer of about 500 .ANG. in thickness is formed on an integrated circuit substrate such as a silicon substrate 11 by thermal oxidation. This silicon oxide layer 12 is referred to as a "pad layer." A silicon nitride layer 13 of about 1000 .ANG. in thickness is deposited on the pad layer, for example by chemical vapor deposition. The pad layer 12 can be used to release stresses between the silicon nitride layer 13 and the silicon substrate 11.
Then, as shown in FIG. 1B, the silicon nitride layer 13 is patterned, for example using photolithography, so that a patterned silicon nitride layer 13a remains on an active region 19 of the silicon substrate 11 where microelectronic devices are to be formed. Accordingly, the pad oxide layer 12 is exposed in the areas where isolation regions are to be formed.
Referring now to FIG. 1C, the silicon substrate 11 is thermally oxidized, for example, by heating in an oxygen atmosphere, using the patterned silicon nitride layer 13a as a mask. Isolation regions 14 of silicon dioxide having a thickness of about 5000 .ANG. are thereby formed. Then, the silicon nitride mask 13a is removed and active devices are formed in the active region 19a which is surrounded by the isolation regions 14.
Unfortunately, as shown in FIG. 1C, when performing the LOCOS method, the oxidation of the silicon substrate proceeds not only in the vertical direction but also in the lateral direction beneath the silicon nitride mask 13a. Thus, well known "bird's beaks" 15 are formed which substantially encroach into the active region of the integrated circuit substrate. As the integration density of integrated circuit devices continues to increase, the bird's beak may consume proportionately larger amounts of the active region.
FIGS. 2A and 2B illustrate a LOCOS method which can reduce the size of the bird's beak. As shown in FIG. 2A, a silicon dioxide layer 22 is formed on a silicon substrate 21. A polysilicon layer 26 is then formed, for example, by chemical vapor deposition, on the silicon dioxide layer 22. A silicon nitride layer 23 is then formed on polysilicon layer 26.
Referring now to FIG. 2B, the silicon nitride layer 23 is patterned to form a silicon nitride mask 23a. Then, the polysilicon layer 26 and the silicon substrate 21 are thermally oxided using the patterned silicon nitride layer 23a as a mask, to thereby form isolation regions 24 of silicon dioxide.
Unfortunately, as shown in FIG. 2B, bird's beaks 25 are also generally formed using this method. However, the bird's beaks 25 may be considerably smaller than the bird's beak 15 of FIG. 1C. In order to further suppress the growth of bird's beaks 25, it may be preferred to form a thick polysilicon layer 26. However, if polysilicon layer 26 is made too thick, projections 27 of the isolation regions 24 may be formed adjacent the bird's beaks 25. These projections may have an undesired effect upon subsequent integrated circuit processing. For example, concave regions may be formed between the projections 27 and the bird's beaks 25 thereby degrading device performance.